1. Field
Exemplary embodiments relate to display technology, and, more particularly, to a thin film transistor array panel and a manufacturing method thereof.
2. Discussion
Conventional liquid crystal displays typically include two display panels with electrodes and a liquid crystal layer disposed between the two display panels. In this manner, voltage may be applied to the electrodes to rearrange the liquid crystal molecules of the liquid crystal layer to control the amount of transmitted light through the liquid crystal layer to facilitate the display of images.
A thin film transistor (TFT) array panel is typically utilized as one of two array panels utilized in a liquid crystal display. To this end, the TFT array panel may be used as a circuit board to independently drive each pixel in the liquid crystal display. It is noted that TFT array panels may be used in association with various flat panel displays, such as liquid crystal displays (LCDs), organic light emitting diode (OLED) displays, plasma displays (PDs), electroluminescent (EL) displays, electrophoretic displays (EPDs), electrowetting displays (EWDs), and the like.
Typical TFT array panels usually have scanning signal lines (or gate lines) to transfer scanning signals, and image signal lines (or data lines) to transfer image signals. To this end, conventional TFT array panels usually include thin film transistors connected to the gate lines and the data lines, pixel electrodes connected to the thin film transistors, a gate insulating layer covering and insulating the gate lines, and an interlayer insulating layer covering and insulating the thin film transistors and the data lines.
When used in association with flat panel displays, a TFT array panel may include a plurality of TFTs, which may include various different types of semiconductor materials. For instance, when an oxide semiconductor is used as a semiconductor material included in a TFT, metallic components of a metal layer, including a source electrode and a drain electrode, may spread to the oxide semiconductor layer. In this manner, a channel layer formed by the oxide semiconductor layer may be degraded. To prevent the degradation of the channel layer, a buffer layer including an oxide may be formed below the metal layer including the source electrode and the drain electrode. However, when the metal layer including the source electrode and the drain electrode, and the buffer layer disposed therebelow are formed, a difference in etching rates may occur with respect to an etching solution and the various aforementioned components. When an etching rate of the buffer layer is high, the buffer layer below the source electrode and the drain electrode may be over-etched. When the buffer layer is over-etched, the source electrode and the drain electrode may be electrically floated. To this end, the thin film transistor may be degraded.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention, and, therefore, it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.